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ISLPED
1995
ACM
116views Hardware» more  ISLPED 1995»
13 years 11 months ago
Activity-sensitive architectural power analysis for the control path
Prompted by demands for portability and low-cost packaging, the electronics industry has begun to view power consumption as a critical design criteria. As such there is a growing ...
Paul E. Landman, Jan M. Rabaey
TC
2008
13 years 7 months ago
Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model
Abstract-- Preventing silicon chips from negative, even disastrous thermal hazards has become increasingly challenging these days; considering thermal effects early in the design c...
Wei Huang, Karthik Sankaranarayanan, Kevin Skadron...
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
13 years 5 months ago
AVF Stressmark: Towards an Automated Methodology for Bounding the Worst-Case Vulnerability to Soft Errors
Soft error reliability is increasingly becoming a first-order design concern for microprocessors, as a result of higher transistor counts, shrinking device geometries and lowering ...
Arun A. Nair, Lizy Kurian John, Lieven Eeckhout
FSE
1997
Springer
131views Cryptology» more  FSE 1997»
14 years 1 days ago
Fast Software Encryption: Designing Encryption Algorithms for Optimal Software Speed on the Intel Pentium Processor
Most encryption algorithms are designed without regard to their performance on top-of-the-line microprocessors. This paper discusses general optimization principles algorithms desi...
Bruce Schneier, Doug Whiting
CCE
2007
13 years 9 months ago
A Web Services based Approach for System on a Chip Design Planning
: The concept of Virtual Organisation (VO) offers various solutions to management, collaboration and coordination issues important for distributed collaborating teams. Deployment o...
Maciej Witczynski, Edward Hrynkiewicz, Adam Pawlak