584 search results - page 51 / 117 » Verification-Aware Microprocessor Design |
MSE
2005
IEEE
14 years 1 months ago
2005
IEEE
System-on-Chip design is an important new trend in the design of complex integrated circuits. The integration of a microprocessor, memory and peripherals onto a single die opens n...
FPL
2001
Springer
14 years 10 days ago
2001
Springer
Asynchronous logic design has been around for decades. However, only recently has it gained any commercial success. Research has focused on a wide variety of uses, from microproces...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
The instruction queue is a critical component and performance bottleneck in superscalar microprocessors. Conventional designs use physical register identifiers to wake up instruct...
ASYNC
2003
IEEE
14 years 1 months ago
2003
IEEE
We present the design of a high performance on-chip pipelined asynchronous DRAM suitable for use in a microprocessor cache. Although traditional DRAM structures suffer from long a...
ISLPED
2005
ACM
14 years 1 months ago
2005
ACM
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...