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» Verification-Aware Microprocessor Design
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ASPLOS
1996
ACM
13 years 12 months ago
Analysis of Branch Prediction Via Data Compression
Branch prediction is an important mechanism in modern microprocessor design. The focus of research in this area has been on designing new branch prediction schemes. In contrast, v...
I-Cheng K. Chen, John T. Coffey, Trevor N. Mudge
ASPLOS
2006
ACM
13 years 11 months ago
SlicK: slice-based locality exploitation for efficient redundant multithreading
Transient faults are expected a be a major design consideration in future microprocessors. Recent proposals for transient fault detection in processor cores have revolved around t...
Angshuman Parashar, Anand Sivasubramaniam, Sudhanv...
CF
2006
ACM
13 years 11 months ago
The potential of the cell processor for scientific computing
The slowing pace of commodity microprocessor performance improvements combined with ever-increasing chip power demands has become of utmost concern to computational scientists. As...
Samuel Williams, John Shalf, Leonid Oliker, Shoaib...
CASES
2008
ACM
13 years 9 months ago
Efficiency and scalability of barrier synchronization on NoC based many-core architectures
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...
Oreste Villa, Gianluca Palermo, Cristina Silvano
DAC
2005
ACM
13 years 9 months ago
How accurately can we model timing in a placement engine?
This paper presents a novel placement algorithm for timing optimization based on a new and powerful concept, which we term differential timing analysis. Recognizing that accurate ...
Amit Chowdhary, Karthik Rajagopal, Satish Venkates...