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ICCAD
2002
IEEE
100views Hardware» more  ICCAD 2002»
14 years 3 months ago
Optimal buffered routing path constructions for single and multiple clock domain systems
Shrinking process geometries and the increasing use of IP components in SoC designs give rise to new problems in routing and buffer insertion. A particular concern is that cross-c...
Soha Hassoun, Charles J. Alpert, Meera Thiagarajan
ATVA
2007
Springer
134views Hardware» more  ATVA 2007»
14 years 2 months ago
Formal Modeling and Verification of High-Availability Protocol for Network Security Appliances
One of the prerequisites for information society is secure and reliable communication among computing systems. Accordingly, network security appliances become key components of inf...
Moonzoo Kim
FDL
2007
IEEE
14 years 2 months ago
Transactor-based Formal Verification of Real-time Embedded Systems
With the increasing complexity of today's embedded systems, there is a need to formally verify such designs at mixed abstraction levels. This is needed if some compoe describ...
Daniel Karlsson, Petru Eles, Zebo Peng
COMPSAC
2004
IEEE
14 years 2 months ago
Cooperative and Group Testing in Verification of Dynamic Composite Web Services
Verifying Web Services (WS) in a dynamic Service Oriented Architecture (SOA) is challenging because new services can be composed at runtime using existing WS. Furthermore, in a co...
Wei-Tek Tsai, Yinong Chen, Raymond A. Paul, Ning L...
ICONIP
2007
13 years 11 months ago
Automatic Factorization of Biological Signals Measured by Fluorescence Correlation Spectroscopy Using Non-negative Matrix Factor
− This paper proposes an automatic factorization method of the biological signals measured by Fluorescence Correlation Spectroscopy (FCS). Since the signals are composed from sev...
Kenji Watanabe, Takio Kurita