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» Verifying Progress in Timed Systems
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ISORC
2007
IEEE
14 years 2 months ago
Time-Predictable Task Preemption for Real-Time Systems with Direct-Mapped Instruction Cache
Modern processors used in embedded systems are becoming increasingly powerful, having features like caches and pipelines to speedup execution. While execution speed of embedded so...
Raimund Kirner, Peter P. Puschner
CODES
2008
IEEE
13 years 9 months ago
Model checking SystemC designs using timed automata
SystemC is widely used for modeling and simulation in hardware/software co-design. Due to the lack of a complete formal semantics, it is not possible to verify SystemC designs. In...
Paula Herber, Joachim Fellmuth, Sabine Glesner
ICWS
2008
IEEE
13 years 9 months ago
A Framework for Verifying SLA Compliance in Composed Services
Service level agreements (SLAs) impose many nonfunctional requirements on services. Business analysts specify and check these requirements in business process models using tools s...
Hua Xiao, Brian Chan, Ying Zou, Jay W. Benayon, Bi...
LOPSTR
2009
Springer
14 years 2 months ago
Deciding Full Branching Time Logic by Program Transformation
Abstract. We present a method based on logic program transformation, for verifying Computation Tree Logic (CTL∗ ) properties of finite state reactive systems. The finite state ...
Alberto Pettorossi, Maurizio Proietti, Valerio Sen...
ECCC
2010
98views more  ECCC 2010»
13 years 6 months ago
Verifying Computations with Streaming Interactive Proofs
Applications based on outsourcing computation require guarantees to the data owner that the desired computation has been performed correctly by the service provider. Methods based...
Graham Cormode, Justin Thaler, Ke Yi