932 search results - page 19 / 187 » Verifying Progress in Timed Systems |
ICSE
1999
IEEE-ACM
13 years 12 months ago
1999
IEEE-ACM
Formal verification methods are used only sparingly in software development. The most successful methods to date are based on the use of model checking tools. To use such he user ...
SIGSOFT
2003
ACM
14 years 8 months ago
2003
ACM
This paper describes a compositional proof strategy for verifying properties of requirements specifications. The proof strategy, which may be applied using either a model checker ...
FORMATS
2006
Springer
13 years 11 months ago
2006
Springer
Timed and weak timed simulation relations are often used to show that operations on hybrid systems result in equivalent behavior or in conservative overapproximations. Given that s...
JSS
2007
13 years 7 months ago
2007
Designing large software systems out of reusable components has become increasingly popular. Although liberal composition of reusable components saves time and expense, many exper...
ASYNC
2002
IEEE
14 years 21 days ago
2002
IEEE
Advanced clock-delayed1 and self-resetting domino circuits are becoming increasingly important design styles in aggressive synchronous as well as asynchronous design. Their design...