1093 search results - page 111 / 219 » Verifying VLSI Circuits |
ARVLSI
1999
IEEE
14 years 2 months ago
1999
IEEE
We describe a method to clock the domino pipeline at the maximum rate by using soft synchronizers between pipeline stages and thus allowing "time borrowing," i.e., allow...
DFT
1999
IEEE
14 years 2 months ago
1999
IEEE
The inherent redundancy and in-the-field reconfiguration capabilities of field programmable gate arrays (FPGAs) provide alternatives to integrated circuit redundancy-based fault r...
FCCM
1999
IEEE
14 years 2 months ago
1999
IEEE
The evolution of computer networking technology will likely require hardware that is flexible enough to adapt to changing standards while maintaining the highest possible performa...
GLVLSI
1998
IEEE
14 years 2 months ago
1998
IEEE
Important layout properties of electronic designs include interconnection length values, clock speed, area requirements, and power dissipation. A reliable estimation of those prop...
VLSID
1998
IEEE
14 years 2 months ago
1998
IEEE
A partial scan selection strategy is proposed in which flip-flops are selected via newly proposed dynamic reachability and observability measures such that the remaining hard-to-d...