1093 search results - page 160 / 219 » Verifying VLSI Circuits |
ASPDAC
1998
ACM
14 years 1 months ago
1998
ACM
— Simple yet useful analytical formulas for delay, slope and crosstalk noise amplitude for capacitively coupled two-, three- and infinite-line systems are derived assuming bus li...
IPPS
1997
IEEE
14 years 1 months ago
1997
IEEE
This paper analyses alternatives for the parallelization of the Simulated Annealing algorithm when applied to the placement of modules in a VLSI circuit considering the use of PVM...
ICRA
2000
IEEE
14 years 13 days ago
2000
IEEE
Our goal is to develop an autonomous robot that will fit within a two-inch cube and will locomote by walking and jumping. The robot will be based on the kinematics of a cricket. I...
WSC
2007
13 years 11 months ago
2007
Adaptive Time Warp protocols in the literature are usually based on a pre-defined analytic model of the system, expressed as a closed form function that maps system state to cont...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
As the minimum feature sizes of VLSI circuits get smaller while the clock frequency increases, the effects of process variations become significant. We propose a UST/DME based ap...