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» Verifying VLSI Circuits
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VLSID
2007
IEEE
142views VLSI» more  VLSID 2007»
14 years 1 months ago
Novel Architectures for High-Speed and Low-Power 3-2, 4-2 and 5-2 Compressors
The 3-2, 4-2 and 5-2 compressors are the basic components in many applications, in particular partial product summation in multipliers. In this paper novel architectures and desig...
Sreehari Veeramachaneni, Kirthi M. Krishna, Lingam...
HPCC
2007
Springer
14 years 1 months ago
On Pancyclicity Properties of OTIS Networks
The OTIS-Network (also referred to as two-level swapped network) is composed of n clones of an n-node original network constituting its clusters. It has received much attention due...
Mohammad R. Hoseinyfarahabady, Hamid Sarbazi-Azad
DELTA
2006
IEEE
14 years 1 months ago
Minimizing Simultaneous Switching Noise (SSN) using Modified Odd/Even Bus Invert Method
In high speed digital circuits, the inductive effect is more dominant compared to capacitive effect. In particular, as the technology is shrinking, the spacing between interconnec...
K. S. Sainarayanan, J. V. R. Ravindra, M. B. Srini...
VLSID
2006
IEEE
145views VLSI» more  VLSID 2006»
14 years 1 months ago
Novel BCD Adders and Their Reversible Logic Implementation for IEEE 754r Format
IEEE 754r is the ongoing revision to the IEEE 754 floating point standard and a major enhancement to the standard is the addition of decimal format. This paper proposes two novel ...
Himanshu Thapliyal, Saurabh Kotiyal, M. B. Sriniva...
CF
2006
ACM
14 years 1 months ago
A nano-scale reconfigurable mesh with spin waves
In this paper, we present a nano-scale reconfigurable mesh that is interconnected with ferromagnetic spin-wave buses. The architecture described here, while requiring the same num...
Mary Mehrnoosh Eshaghian-Wilner, Alexander Khitun,...