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1093
search results - page 27 / 219
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Verifying VLSI Circuits
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DAC
1993
ACM
96
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Computer Architecture
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DAC 1993
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Performance-Constrained Worst-Case Variability Minimization of VLSI Circuits
14 years 25 days ago
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www.eecs.berkeley.edu
Abhijit Dharchoudhury, Sung-Mo Kang
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27
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ICCAD
1995
IEEE
96
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Hardware
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ICCAD 1995
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Delay optimal partitioning targeting low power VLSI circuits
14 years 8 days ago
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atrak.usc.edu
Hirendu Vaishnav, Massoud Pedram
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24
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ICCAD
1991
IEEE
80
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Hardware
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ICCAD 1991
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A Systematic Approach for Designing Testable VLSI Circuits
14 years 7 days ago
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poisson.usc.edu
Sen-Pin Lin, Charles Njinda, Melvin A. Breuer
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15
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TODAES
2002
89
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TODAES 2002
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Cluster-aware iterative improvement techniques for partitioning large VLSI circuits
13 years 8 months ago
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eref.uqu.edu.sa
Shantanu Dutt, Wenyong Deng
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29
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ISVLSI
2007
IEEE
185
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VLSI
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ISVLSI 2007
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A High Swing Low Power CMOS Differential Voltage-Controlled Ring Oscillator
14 years 3 months ago
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www.iberchip.org
This paper presents a two-stage CMOS differential voltage-controlled ring oscillator (VCO). The VCO is intended to operate as a frequency synthesizer in a PLL to generate local os...
Luciano Severino de Paula, Eric E. Fabris, Sergio ...
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