1093 search results - page 43 / 219 » Verifying VLSI Circuits |
VLSID
1999
IEEE
14 years 1 months ago
1999
IEEE
Retiming is a transformation that optimizes a sequential circuit by relocating the registers. When the circuit has an initial state, one must compute an equivalent initial state f...
DFT
1998
IEEE
14 years 1 months ago
1998
IEEE
This paper presents a system to evaluate the testability of an on-line testable circuit. The system operates at the RT-level, before the logic synthesis step, and allows for an ex...
DAC
1990
ACM
14 years 24 days ago
1990
ACM
In this paper, we provide an overview of a system designed for verifying the consistency of timing specifications for digital circuits. The utility of the system comes from the ne...
DFT
2008
IEEE
14 years 3 months ago
2008
IEEE
VLSI circuits in nanometer VLSI technology experience significant aging effects, which are embodied by performance degradation over operation time. Although this degradation can b...
HICSS
2003
IEEE
14 years 2 months ago
2003
IEEE
Abstract— This paper presents a framework for verifying compilation tools for parametrised hardware libraries with placement information. Such libraries are captured in Pebble, a...