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search results - page 5 / 219
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Verifying VLSI Circuits
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GLVLSI
1999
IEEE
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Design and Analysis of a Novel Quantum-MOS Sense Amplifier Circuit
13 years 11 months ago
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Tetsuya Uemura, Pinaki Mazumder
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GLVLSI
1999
IEEE
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Residue Arithmetic Circuits Based on Signed-Digit Number Representation and the VHDL Implementation
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Shugang Wei, Kensuke Shimizu
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GLVLSI
1998
IEEE
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Mutually Disjoint Signals and Probability Calculation in Digital Circuits
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Vishwani D. Agrawal, Sharad C. Seth
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GLVLSI
1998
IEEE
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Test Compaction for Synchronous Sequential Circuits by Test Sequence Recycling
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Irith Pomeranz, Sudhakar M. Reddy
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GLVLSI
1998
IEEE
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A Design-for-Testability Technique for Detecting Delay Faults in Logic Circuits
13 years 11 months ago
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Kaamran Raahemifar, Majid Ahmadi
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