1093 search results - page 84 / 219 » Verifying VLSI Circuits |
DFT
2008
IEEE
14 years 4 months ago
2008
IEEE
Nanoelectronic components are expected to suffer from very high error rates, implying the need for hardening techniques. We propose a fine-grained approach to harden a promising...
DFT
2005
IEEE
14 years 3 months ago
2005
IEEE
The present paper proposes a new method for detecting arbitrary faults in a functional circuit when the set of codewords is limited and known in advance. The method is based on im...
EURODAC
1994
IEEE
14 years 2 months ago
1994
IEEE
Symbolic state space exploration techniques for Finite State Machines (FSMs) are a major recent result in CAD for VLSI. Most of them are exact and based on forward traversal, but ...
GLVLSI
2009
IEEE
14 years 4 months ago
2009
IEEE
Resource based optimization for high performance integrated circuits is presented. The methodology is applied to simultaneous shield and repeater insertion, resulting in minimum c...
GLVLSI
2006
IEEE
14 years 4 months ago
2006
IEEE
State-space modeling of fully differential Gm-C filters with weak nonlinearities is used to develop a fast algorithm for intermodulation distortion estimation. It results in sim...