1093 search results - page 99 / 219 » Verifying VLSI Circuits |
ISVLSI
2005
IEEE
14 years 4 months ago
2005
IEEE
— Direct tunneling current is the major component of static power dissipation of a CMOS circuit for technology below 65nm, where the gate dielectric (SiO2) is very low. We intuit...
ISVLSI
2003
IEEE
14 years 4 months ago
2003
IEEE
Three-dimensional integration technologies have been proposed in order to mitigate design challenges posed by deep-submicron interconnect. By providing multiple layers of active d...
DAC
2003
ACM
14 years 4 months ago
2003
ACM
Reduction of an extracted netlist is an important pre-processing step for techniques such as model order reduction in the design and analysis of VLSI circuits. This paper describe...
TCAD
2008
13 years 11 months ago
2008
Abstract--Design of a suitable power gating (e.g., multithreshold CMOS or super cutoff CMOS) structure is an important and challenging task in sub-90nm VLSI circuits where leakage ...
VLSID
2005
IEEE
14 years 11 months ago
2005
IEEE
An accurate and efficient stacking effect macro-model for leakage power in sub-100nm circuits is presented in this paper. Leakage power, including subthreshold leakage power and ga...