Sciweavers

1508 search results - page 239 / 302
» Versatile Processor Design for Efficiency and High Performan...
Sort
View
HPDC
2010
IEEE
13 years 10 months ago
LogGOPSim: simulating large-scale applications in the LogGOPS model
We introduce LogGOPSim--a fast simulation framework for parallel algorithms at large-scale. LogGOPSim utilizes a slightly extended version of the well-known LogGPS model in combin...
Torsten Hoefler, Timo Schneider, Andrew Lumsdaine
TSP
2008
90views more  TSP 2008»
13 years 8 months ago
Array-Based QR-RLS Multichannel Lattice Filtering
An array-based algorithm for multichannel lattice filtering is proposed. The filter is formed by a set of units that are adapted locally and concurrently using recursions that clos...
J. Gomes, V. A. N. Barroso
ISCA
2012
IEEE
218views Hardware» more  ISCA 2012»
11 years 11 months ago
Towards energy-proportional datacenter memory with mobile DRAM
To increase datacenter energy efficiency, we need memory systems that keep pace with processor efficiency gains. Currently, servers use DDR3 memory, which is designed for high b...
Krishna T. Malladi, Frank A. Nothaft, Karthika Per...
ICCD
2006
IEEE
109views Hardware» more  ICCD 2006»
14 years 5 months ago
Improving Scalability and Complexity of Dynamic Scheduler through Wakeup-Based Scheduling
This paper presents a new scheduling technique to improve the speed, power, and scalability of a dynamic scheduler. In a high-performance superscalar processor, the instruction sc...
Kuo-Su Hsiao, Chung-Ho Chen
ICCD
2006
IEEE
183views Hardware» more  ICCD 2006»
14 years 5 months ago
An Active Decoupling Capacitance Circuit for Inductive Noise Suppression in Power Supply Networks
The placement of on-die decoupling capacitors (decap) between the power and ground supply grids has become a common practice in high performance processor designs. In this paper, ...
Sanjay Pant, David Blaauw