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ISLPED
2005
ACM
108views Hardware» more  ISLPED 2005»
14 years 2 months ago
Replacing global wires with an on-chip network: a power analysis
This paper explores the power implications of replacing global chip wires with an on-chip network. We optimize network links by varying repeater spacing, link pipelining, and volt...
Seongmoo Heo, Krste Asanovic
SLIP
2005
ACM
14 years 2 months ago
A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool
The interconnection architecture of FPGAs such as switches dominates performance of FPGAs. Three-dimensional integration of FPGAs overcomes interconnect limitations by allowing in...
Young-Su Kwon, Payam Lajevardi, Anantha P. Chandra...
ASYNC
2003
IEEE
73views Hardware» more  ASYNC 2003»
14 years 2 months ago
Self-Timed Ring for Globally-Asynchronous Locally-Synchronous Systems
The lack of proven mechanisms for transferring data between multiple synchronous islands has been a major impediment for applying globally asynchronous locally synchronous (GALS) ...
Thomas Villiger, Hubert Kaeslin, Frank K. Gür...
EH
2003
IEEE
136views Hardware» more  EH 2003»
14 years 2 months ago
Experimental Results in Evolutionary Fault-Recovery for Field Programmable
This paper presents experimental results of fast intrinsic evolutionary design and evolutionary fault recovery of a 4-bit Digital to Analog Converter (DAC) using the JPL stand-alo...
Ricardo Salem Zebulum, Didier Keymeulen, Vu Duong,...
ISMVL
2003
IEEE
101views Hardware» more  ISMVL 2003»
14 years 2 months ago
Bidirectional Data Transfer Based Asynchronous VLSI System Using Multiple-Valued Current Mode Logic
A new asynchronous data transfer scheme using multiple-valued 2-color 1-phase coding, called a bidirectional data transfer scheme, is proposed for a highperformance and low-power ...
Takahiro Hanyu, Tomohiro Takahashi, Michitaka Kame...