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CF
2010
ACM
14 years 2 months ago
On-chip communication and synchronization mechanisms with cache-integrated network interfaces
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
Stamatis G. Kavadias, Manolis Katevenis, Michail Z...
GECCO
2007
Springer
159views Optimization» more  GECCO 2007»
14 years 4 months ago
A systemic computation platform for the modelling and analysis of processes with natural characteristics
Computation in biology and in conventional computer architectures seem to share some features, yet many of their important characteristics are very different. To address this, [1]...
Erwan Le Martelot, Peter J. Bentley, R. Beau Lotto
FORTE
2000
13 years 11 months ago
Systematic Performance Evaluation of Multipoint Protocols
The adventof multipoint(multicast-based) applications and the growth and complexity of the Internet has complicated network protocol design and evaluation. In this paper, we prese...
Ahmed Helmy, Sandeep K. S. Gupta, Deborah Estrin, ...
PLDI
2005
ACM
14 years 3 months ago
Programming ad-hoc networks of mobile and resource-constrained devices
Ad-hoc networks of mobile devices such as smart phones and PDAs represent a new and exciting distributed system architecture. Building distributed applications on such an architec...
Yang Ni, Ulrich Kremer, Adrian Stere, Liviu Iftode
ICPP
2009
IEEE
14 years 4 months ago
Bank-aware Dynamic Cache Partitioning for Multicore Architectures
Abstract—As Chip-Multiprocessor systems (CMP) have become the predominant topology for leading microprocessors, critical components of the system are now integrated on a single c...
Dimitris Kaseridis, Jeffrey Stuecheli, Lizy K. Joh...