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ISCA
2012
IEEE
333views Hardware» more  ISCA 2012»
11 years 10 months ago
Reducing memory reference energy with opportunistic virtual caching
Most modern cores perform a highly-associative translation look aside buffer (TLB) lookup on every memory access. These designs often hide the TLB lookup latency by overlapping it...
Arkaprava Basu, Mark D. Hill, Michael M. Swift
GI
2001
Springer
13 years 12 months ago
Access of Mobile IP Users to Firewall Protected VPNs
: The paper describes an architecture allowing Mobile IP hosts to access to a virtual private network that is protected by a firewall from the public Internet. The implementation b...
Marc Danzeisen, Torsten Braun
CORR
2010
Springer
99views Education» more  CORR 2010»
13 years 7 months ago
INDECT Advanced Security Requirements
This paper reviews the requirements for the security mechanisms that are currently being developed in the framework of the European research project INDECT. An overview of features...
Manuel Urueña, Petr Machnik, Maria Martinez...
MICRO
2006
IEEE
102views Hardware» more  MICRO 2006»
14 years 1 months ago
Managing Distributed, Shared L2 Caches through OS-Level Page Allocation
This paper presents and studies a distributed L2 cache management approach through OS-level page allocation for future many-core processors. L2 cache management is a crucial multi...
Sangyeun Cho, Lei Jin
ACMMSP
2006
ACM
247views Hardware» more  ACMMSP 2006»
14 years 1 months ago
A flexible data to L2 cache mapping approach for future multicore processors
This paper proposes and studies a distributed L2 cache management approach through page-level data to cache slice mapping in a future processor chip comprising many cores. L2 cach...
Lei Jin, Hyunjin Lee, Sangyeun Cho