425 search results - page 45 / 85 » Virtual private caches |
MICRO
2005
IEEE
14 years 2 months ago
2005
IEEE
Large numbers of logical registers can improve performance by allowing fast access to multiple subroutine contexts (register windows) and multiple thread contexts (multithreading)...
JSA
2008
13 years 8 months ago
2008
Architectural advancements in modern processor designs increase average performance with features such as pipelines, caches, branch prediction, and out-of-order execution. However...
INFOCOM
2007
IEEE
14 years 3 months ago
2007
IEEE
— We present a software infrastructure that embeds physical hosts in a simulated network. Aiming to create a largescale real-time virtual network testbed, our real-time interacti...
HPCA
2007
IEEE
14 years 9 months ago
2007
IEEE
This paper proposes a hardware transactional memory (HTM) system called LogTM Signature Edition (LogTM-SE). LogTM-SE uses signatures to summarize a transaction's readand writ...
CANPC
1999
Springer
14 years 1 months ago
1999
Springer
Streamlining communication is key to achieving good performance in shared-memory parallel programs. While full hardware support for cache coherence generally offers the best perfo...