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DSD
2010
IEEE
137views Hardware» more  DSD 2010»
15 years 9 days ago
A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Ku...
109
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SIGSOFT
2008
ACM
16 years 3 months ago
Improving robustness of evolving exceptional behaviour in executable models
Executable models are increasingly being employed by development teams to implement robust software systems. Modern executable models offer powerful composition mechanisms that al...
Alessandro Garcia, Nélio Cacho, Thomas Cott...
CN
2000
114views more  CN 2000»
15 years 2 months ago
Improving goodputs of IP packets under ATM UBR traffic with port-based queueing schemes
ATM networks are widely adopted as backbone networks. TCP/IP are the most popular protocols today and it is quite possible that packets are forwarded by ATM networks. In ATM netwo...
Wei Kuang Lai, Mu-Rung Shiu
TII
2010
146views Education» more  TII 2010»
14 years 9 months ago
A Flexible Design Flow for Software IP Binding in FPGA
Software intellectual property (SWIP) is a critical component of increasingly complex field programmable gate arrays (FPGA)-based system-on-chip (SOC) designs. As a result, develop...
Michael A. Gora, Abhranil Maiti, Patrick Schaumont
COMCOM
2004
92views more  COMCOM 2004»
15 years 2 months ago
Benefits of traffic engineering using QoS routing schemes and network controls
We demonstrate the benefits of traffic engineering by studying three realistic network models derived from an actual service provider network. We evaluate traffic engineering in t...
Shekhar Srivastava, Balaji Krithikaivasan, Cory C....