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CODES
2007
IEEE
14 years 2 months ago
Channel trees: reducing latency by sharing time slots in time-multiplexed networks on chip
Networks on Chip (NoC) have emerged as the design paradigm for scalable System on Chip communication infrastructure. A growing number of applications, often with firm (FRT) or so...
Andreas Hansson, Martijn Coenen, Kees Goossens
MOBISYS
2004
ACM
14 years 7 months ago
Improving the Latency of 802.11 hand-offs using Neighbor Graphs
The 802.11 IEEE Standard has enabled low cost and effective wireless LAN services (WLAN). With the sales and deployment of WLAN based networks exploding, many people believe that ...
Minho Shin, Arunesh Mishra, William A. Arbaugh
INFOCOM
2008
IEEE
14 years 2 months ago
Algorithms for Low-Latency Remote File Synchronization
The remote file synchronization problem is how to update an outdated version of a file located on one machine to the current version located on another machine with a minimal am...
Hao Yan, Utku Irmak, Torsten Suel
ICS
2004
Tsinghua U.
14 years 1 months ago
Scaling the issue window with look-ahead latency prediction
In contemporary out-of-order superscalar design, high IPC is mainly achieved by exposing high instruction level parallelism (ILP). Scaling issue window size can certainly provide ...
Yongxiang Liu, Anahita Shayesteh, Gokhan Memik, Gl...
MSS
2005
IEEE
62views Hardware» more  MSS 2005»
14 years 1 months ago
Predictive Reduction of Power and Latency (PuRPLe)
Increasing efforts have been aimed towards the management of power as a critical system resource, and the disk can consume approximately a third of the power required for a typica...
Matthew Craven, Ahmed Amer