49 search results - page 6 / 10 » WCET-aware register allocation based on graph coloring |
POPL
2003
ACM
14 years 8 months ago
2003
ACM
Multimedia and network processing applications make extensive use of subword data. Since registers are capable of holding a full data word, when a subword variable is assigned a r...
WCE
2007
13 years 8 months ago
2007
Improving testability during the early stages of High-level synthesis has several advantages including reduced test hardware overhead and design iterations. Recently, BIST techniq...
IEEEPACT
2002
IEEE
14 years 17 days ago
2002
IEEE
Many modern embedded processors (esp. DSPs) support partitioned memory banks (also called X-Y memory or dual bank memory) along with parallel load/store instructions to achieve co...
CC
2003
Springer
14 years 26 days ago
2003
Springer
We define the Value State Dependence Graph (VSDG). The VSDG is a form of the Value Dependence Graph (VDG) extended by the addition of state dependence edges to model sequentialise...
APPROX
2009
Springer
14 years 2 months ago
2009
Springer
We consider the problem of aligned coloring of interval and chordal graphs. These problems have substantial applications to register allocation in compilers and have recently been ...