108 search results - page 16 / 22 » WS-BPEL Process Compiler for Resource-Constrained Embedded S... |
LCPC
2007
Springer
14 years 1 months ago
2007
Springer
Massively parallel SIMD array architectures are making their way into embedded processors. In these architectures, a number of identical processing elements having small private st...
SAMOS
2004
Springer
14 years 27 days ago
2004
Springer
Abstract. Loop unrolling plays an important role in compilation for Reconfigurable Processing Units (RPUs) as it exposes operator parallelism and enables other transformations (e.g...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
This workshop provides a forum for an overview, project presentations, and discussion of the research fostered and funded initially by the NSF Next Generation Software (NGS) Progr...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Mapping packet processing applications onto embedded network processors (NP) is a challenging task due to the unique constraints of NP systems and the characteristics of network a...
ISLPED
2005
ACM
14 years 1 months ago
2005
ACM
In this paper, we take the idea of application-level processing on disks to one level further, and focus on an architecture, called Cluster of Active Disks (CAD), where the storag...