174 search results - page 26 / 35 » Web-based Distributed VLSI Design |
EURODAC
1994
IEEE
14 years 2 months ago
1994
IEEE
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
VLSID
2007
IEEE
14 years 10 months ago
2007
IEEE
In this paper we explore the use of a set of novel design metrics for characterizing the impact of gate oxide tunneling current in nanometer CMOS devices and perform Monte Carlo s...
IPPS
2003
IEEE
14 years 3 months ago
2003
IEEE
The dual-cube is a newly proposed topology for interconnection networks, which uses low dimensional hypercubes as building blocks. The primary advantages of the dual-cube over the...
IPPS
1998
IEEE
14 years 2 months ago
1998
IEEE
Boundeddegreenetworks like deBruijn graphsor wrapped butterfly networks are very important from VLSI implementation point of view as well as for applications where the computing n...
ISPD
2003
ACM
14 years 3 months ago
2003
ACM
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...