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MICRO
2009
IEEE
147views Hardware» more  MICRO 2009»
14 years 4 months ago
Complexity effective memory access scheduling for many-core accelerator architectures
Modern DRAM systems rely on memory controllers that employ out-of-order scheduling to maximize row access locality and bank-level parallelism, which in turn maximizes DRAM bandwid...
George L. Yuan, Ali Bakhoda, Tor M. Aamodt
INFOCOM
2003
IEEE
14 years 3 months ago
Input Queued Switches: Cell Switching vs. Packet Switching
— Input Queued(IQ) switches have been very well studied in the recent past. The main problem in the IQ switches concerns scheduling. The main focus of the research has been the ï...
Yashar Ganjali, Abtin Keshavarzian, Devavrat Shah
PCM
2010
Springer
175views Multimedia» more  PCM 2010»
13 years 8 months ago
Non-blind Image Deconvolution with Adaptive Regularization
Ringing and noise amplification are the most dominant artifacts in image deconvolution. These artifacts can be reduced by introducing image prior into the deconvolution process. A ...
Jong-Ho Lee, Yo-Sung Ho
INFOCOM
2002
IEEE
14 years 3 months ago
BSFQ: Bin Sort Fair Queueing
—Existing packet schedulers that provide fair sharing of an output link can be divided into two classes: sorted priority and frame-based. Sorted priority methods provide excellen...
Shun Yan Cheung, Corneliu S. Pencea
FOCS
1995
IEEE
14 years 1 months ago
Tracking the Best Disjunction
Abstract. Littlestone developed a simple deterministic on-line learning algorithm for learning k-literal disjunctions. This algorithm (called Winnow) keeps one weight for each of t...
Peter Auer, Manfred K. Warmuth