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ASWEC
2009
IEEE
14 years 3 months ago
Component Coordination in GLoo
Incorporating components from a number of different sources into a given application is generally considered to be a non-trivial activity. Over the years, various coordination mec...
Jean-Guy Schneider, Markus Lumpe
IPPS
2008
IEEE
14 years 3 months ago
Intermediate checkpointing with conflicting access prediction in transactional memory systems
Transactional memory systems promise to reduce the burden of exposing thread-level parallelism in programs by relieving programmers from analyzing complex inter-thread dependences...
M. M. Waliullah, Per Stenström
ISVLSI
2007
IEEE
121views VLSI» more  ISVLSI 2007»
14 years 3 months ago
Performance of Graceful Degradation for Cache Faults
In sub-90nm technologies, more frequent hard faults pose a serious burden on processor design and yield control. In addition to manufacturing-time chip repair schemes, microarchit...
Hyunjin Lee, Sangyeun Cho, Bruce R. Childers
FPL
2007
Springer
137views Hardware» more  FPL 2007»
14 years 3 months ago
Multi-processor System-level Synthesis for Multiple Applications on Platform FPGA
Multiprocessor systems-on-chip (MPSoC) are being developed in increasing numbers to support the high number of applications running on modern embedded systems. Designing and progr...
Akash Kumar, Shakith Fernando, Yajun Ha, Bart Mesm...
IPPS
2006
IEEE
14 years 3 months ago
Loosely-coupled loop scheduling in computational grids
Loop distribution is one of the most useful techniques to reduce the execution time of parallel applications. Traditionally, loop scheduling algorithms are implemented based on pa...
Jose Herrera, Eduardo Huedo, Rubén S. Monte...