94 search results - page 17 / 19 » Wire width planning for interconnect performance optimizatio... |
ASPDAC
2005
ACM
14 years 27 days ago
2005
ACM
－In high performance systems, process variations and fluctuations of operating environments have significant impact on the clock skew. Recently, hybrid structures of H-tree and m...
CCR
2004
13 years 7 months ago
2004
IP address lookup is challenging for high performance routers because it requires a longest matching prefix at speeds of up to 10 Gbps (OC-192). Existing solutions have poor updat...
CCE
2004
13 years 7 months ago
2004
In the literature, optimization models deal with planning and scheduling of several subsystems of the petroleum supply chain such as oilfield infrastructure, crude oil supply, ref...
ICMCS
2005
IEEE
14 years 28 days ago
2005
IEEE
As the VLSI technology advances continuously, ASIC can easily achieve the required performance and most of them are actually over-designed. Thus, architecture shrinking is inevita...
ISCA
2008
IEEE
13 years 7 months ago
2008
IEEE
Network-on-Chip (NoC) architectures have been adopted by a growing number of multi-core designs as a flexible and scalable solution to the increasing wire delay constraints in the...