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ICCAD
2003
IEEE
144views Hardware» more  ICCAD 2003»
14 years 5 months ago
A High-level Interconnect Power Model for Design Space Exploration
— In this paper, we present a high-level power model to estimate the power consumption in semi-global and global interconnects. Such interconnects are used for communications bet...
Pallav Gupta, Lin Zhong, Niraj K. Jha
CODES
2006
IEEE
14 years 2 months ago
A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control
When designing a System-on-Chip (SoC) using a Networkon-Chip (NoC), silicon area and power consumption are two key elements to optimize. A dominant part of the NoC area and power ...
Martijn Coenen, Srinivasan Murali, Andrei Radulesc...
DSN
2006
IEEE
14 years 2 months ago
Eventual Leader Election with Weak Assumptions on Initial Knowledge, Communication Reliability, and Synchrony
This paper considers the eventual leader election problem in asynchronous message-passing systems where an arbitrary number t of processes can crash (t < n, where n is the tota...
Antonio Fernández, Ernesto Jiménez, ...
COMPGEOM
2006
ACM
14 years 2 months ago
Minimum-cost coverage of point sets by disks
We consider a class of geometric facility location problems in which the goal is to determine a set X of disks given by their centers (tj) and radii (rj) that cover a given set of...
Helmut Alt, Esther M. Arkin, Hervé Brö...
FCT
2005
Springer
14 years 2 months ago
The Maximum Resource Bin Packing Problem
Usually, for bin packing problems, we try to minimize the number of bins used or in the case of the dual bin packing problem, maximize the number or total size of accepted items. ...
Joan Boyar, Leah Epstein, Lene M. Favrholdt, Jens ...