Sciweavers

564 search results - page 102 / 113
» Wireplanning in logic synthesis
Sort
View
ICST
2008
IEEE
14 years 1 months ago
On Combining Multi-formalism Knowledge to Select Models for Model Transformation Testing
Testing remains a major challenge for model transformation development. Test models that are used as test data for model transformations, are constrained by various sources of kno...
Sagar Sen, Benoit Baudry, Jean-Marie Mottu
VTS
2007
IEEE
143views Hardware» more  VTS 2007»
14 years 1 months ago
RTL Test Point Insertion to Reduce Delay Test Volume
In this paper, a novel test point insertion methodology is presented for RTL designs that aims to reduce the data volume of scan-based transition delay tests. Test points are iden...
Kedarnath J. Balakrishnan, Lei Fang
AI
2007
Springer
14 years 1 months ago
Constructing a User Preference Ontology for Anti-spam Mail Systems
The judgment that whether an email is spam or non-spam may vary from person to person. Different individuals can have totally different responses to the same email based on their p...
Jongwan Kim, Dejing Dou, Haishan Liu, Donghwi Kwak
SAT
2007
Springer
95views Hardware» more  SAT 2007»
14 years 1 months ago
Solving Multi-objective Pseudo-Boolean Problems
Integer Linear Programs are widely used in areas such as routing problems, scheduling analysis and optimization, logic synthesis, and partitioning problems. As many of these proble...
Martin Lukasiewycz, Michael Glaß, Christian ...
SOCO
2007
Springer
14 years 1 months ago
Synthesizing Communication Middleware from Explicit Connectors in Component Based Distributed Architectures
In component based software engineering, an application is build by composing trusted and reusable units of execution, the components. A composition is formed by connecting the com...
Dietmar Schreiner, Karl M. Göschka