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» Wireplanning in logic synthesis
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TCAD
2008
93views more  TCAD 2008»
13 years 7 months ago
Transforming Cyclic Circuits Into Acyclic Equivalents
Abstract--Designers and high-level synthesis tools can introduce unwanted cycles in digital circuits, and for certain combinational functions, cyclic circuits that are stable and d...
Osama Neiroukh, Stephen A. Edwards, Xiaoyu Song
LOPSTR
1997
Springer
13 years 11 months ago
Development of Correct Transformation Schemata for Prolog Programs
Schema-based program transformation [8] has been proposed as an effective technique for the optimisation of logic programs. Schemata are applied to a logic program, mapping ineffi...
Julian Richardson, Norbert E. Fuchs
CASES
2005
ACM
13 years 9 months ago
Exploring the design space of LUT-based transparent accelerators
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...
Sami Yehia, Nathan Clark, Scott A. Mahlke, Kriszti...
AI
2008
Springer
13 years 7 months ago
Maintenance goals of agents in a dynamic environment: Formulation and policy construction
The notion of maintenance often appears in the AI literature in the context of agent behavior and planning. In this paper, we argue that earlier characterizations of the notion of...
Chitta Baral, Thomas Eiter, Marcus Bjäreland,...
DAC
2002
ACM
14 years 8 months ago
ILP-based engineering change
We have developed a generic integer linear programming(ILP)based engineering change(EC) methodology. The EC methodology has three components: enabling, fast, and preserving. Enabl...
Farinaz Koushanfar, Jennifer L. Wong, Jessica Feng...