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HPCA
1999
IEEE
14 years 22 days ago
Instruction Recycling on a Multiple-Path Processor
Processors that can simultaneously execute multiple paths of execution will only exacerbate the fetch bandwidth problem already plaguing conventional processors. On a multiple-pat...
Steven Wallace, Dean M. Tullsen, Brad Calder
EDBT
2006
ACM
91views Database» more  EDBT 2006»
14 years 3 days ago
Multi-query SQL Progress Indicators
Recently, progress indicators have been proposed for SQL queries in RDBMSs. All previously proposed progress indicators consider each query in isolation, ignoring the impact simult...
Gang Luo, Jeffrey F. Naughton, Philip S. Yu
ICS
2000
Tsinghua U.
14 years 21 hour ago
Characterizing processor architectures for programmable network interfaces
The rapid advancements of networking technology have boosted potential bandwidth to the point that the cabling is no longer the bottleneck. Rather, the bottlenecks lie at the cros...
Patrick Crowley, Marc E. Fiuczynski, Jean-Loup Bae...
MICRO
2010
IEEE
215views Hardware» more  MICRO 2010»
13 years 6 months ago
A Task-Centric Memory Model for Scalable Accelerator Architectures
This paper presents a task-centric memory model for 1000-core compute accelerators. Visual computing applications are emerging as an important class of workloads that can exploit ...
John H. Kelm, Daniel R. Johnson, Steven S. Lumetta...
IEEECIT
2010
IEEE
13 years 6 months ago
Adaptive Algorithms for Efficient Content Management in Social Network Services
Identifying the set of resources that are expected to receive the majority of requests in the near future, namely hot set, is at the basis of most content management strategies of...
Claudia Canali, Michele Colajanni, Riccardo Lancel...