399 search results - page 54 / 80 » XTR Implementation on Reconfigurable Hardware |
FPL
2006
Springer
14 years 1 months ago
2006
Springer
In this paper we present the design and implementation of a dynamically reconfigurable system for packet queue scheduling. Two widely accepted queue schedulers have been implement...
ERSA
2003
13 years 11 months ago
2003
Camera 1 Camera 3 Camera 2 Controller Moving object FPGA PowerPC SDRAM Coprocessor Image Sensor SDRAM FlashRAM a) b) Many vision applications perform intensive computations and de...
ISW
2001
Springer
14 years 2 months ago
2001
Springer
In this paper, we present the results of the first phase of a project aimed at implementing a full suite of IPSec cryptographic transformations in reconfigurable hardware. Full imp...
DAC
2008
ACM
14 years 10 months ago
2008
ACM
This paper presents a RTR FPGA embedded in a System on Chip fabricated in 130nm CMOS process. Various aspects of the design flow, from automation to floor-planning are discussed. ...
FPGA
2006
ACM
14 years 1 months ago
2006
ACM
In this paper, we present reconfigurable hardware architecture for detecting semantics of streaming data on 1+ Gbps networks. The design leverages on the characteristics of contex...