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» XTR Implementation on Reconfigurable Hardware
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ISCAS
2005
IEEE
163views Hardware» more  ISCAS 2005»
14 years 3 months ago
A reconfigurable crossbar switch with adaptive bandwidth control for networks-on-chip
— We propose a new crossbar switch structure with adaptive bandwidth control. In a complex SoC design, the proposed crossbar switch efficiently incorporates various IPs with diff...
Donghyun Kim, Kangmin Lee, Se-Joong Lee, Hoi-Jun Y...
FCCM
2004
IEEE
103views VLSI» more  FCCM 2004»
14 years 1 months ago
A Dynamically-Reconfigurable, Power-Efficient Turbo Decoder
The development of turbo codes has allowed for nearShannon limit information transfer in modern communication systems. Although turbo decoding is viewed as superior to alternate d...
Jian Liang, Russell Tessier, Dennis Goeckel
FCCM
2008
IEEE
115views VLSI» more  FCCM 2008»
14 years 4 months ago
Simultaneous Retiming and Placement for Pipelined Netlists
Although pipelining or C-slowing an FPGA-based application can potentially dramatically improve the performance, this poses a question for conventional reconfigurable architecture...
Kenneth Eguro, Scott Hauck
IPPS
2007
IEEE
14 years 4 months ago
An Architectural Framework for Automated Streaming Kernel Selection
Hardware accelerators are increasingly used to extend the computational capabilities of baseline scalar processors to meet the growing performance and power requirements of embedd...
Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan L...
ERSA
2006
150views Hardware» more  ERSA 2006»
13 years 11 months ago
An Area Time Efficient Field Programmable Mersenne Twister Uniform Random Number Generator
Reconfigurable computing offers an attractive solution to accelerating infrared scene simulations. In infrared scene simulations, the modeling of a number of atmospheric and optic...
Vinay Sriram, David Kearney