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ARC
2009
Springer
134views Hardware» more  ARC 2009»
14 years 2 months ago
A HyperTransport 3 Physical Layer Interface for FPGAs
Abstract. This paper presents the very first implementation of a HyperTransport 3 physical layer interface for Field Programmable Gate Arrays. HyperTransport is a low latency, high...
Heiner Litz, Holger Fröning, Ulrich Brün...
CAI
2004
Springer
13 years 9 months ago
An Evolvable Combinational Unit for FPGAs
A complete hardware implementation of an evolvable combinational unit for FPGAs is presented. The proposed combinational unit consisting of a virtual reconfigurable circuit and evo...
Lukás Sekanina, Stepan Friedl
EH
2003
IEEE
136views Hardware» more  EH 2003»
14 years 3 months ago
Experimental Results in Evolutionary Fault-Recovery for Field Programmable
This paper presents experimental results of fast intrinsic evolutionary design and evolutionary fault recovery of a 4-bit Digital to Analog Converter (DAC) using the JPL stand-alo...
Ricardo Salem Zebulum, Didier Keymeulen, Vu Duong,...
EH
2000
IEEE
156views Hardware» more  EH 2000»
14 years 2 months ago
Evolution of Analog Circuits on Field Programmable Transistor Arrays
Evolvable Hardware (EHW) refers to HW design and selfreconfiguration using evolutionary/genetic mechanisms. The paper presents an overview of some key concepts of EHW, describing ...
Adrian Stoica, Didier Keymeulen, Ricardo Salem Zeb...
ANCS
2010
ACM
13 years 7 months ago
An architecture for software defined cognitive radio
As we move forward towards the next generation of wireless protocols, the push for a better radio physical layer is ever increasing. Conventional radio architectures are limited t...
Aveek Dutta, Dola Saha, Dirk Grunwald, Douglas C. ...