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GLOBECOM
2008
IEEE
14 years 2 months ago
Evaluating the Performance on ID/Loc Mapping
—Challenges of routing scalability has attracted many research efforts, represented by the works of splitting identifier and locator semantics of IP addresses. A group of identi...
Hong Zhang, Maoke Chen, Yuncheng Zhu
ISPASS
2008
IEEE
14 years 2 months ago
Investigating the TLB Behavior of High-end Scientific Applications on Commodity Microprocessors
The floating point portion of the SPEC CPU suite and the HPC Challenge suite are widely recognized and utilized as benchmarks that represent scientific application behavior. In th...
Collin McCurdy, Alan L. Cox, Jeffrey S. Vetter
DATE
2007
IEEE
155views Hardware» more  DATE 2007»
14 years 2 months ago
A novel technique to use scratch-pad memory for stack management
Extensive work has been done for optimal management of scratch-pad memory (SPM) all assuming that the SPM is assigned a fixed address space. The main target objects to be placed o...
Soyoung Park, Hae-woo Park, Soonhoi Ha
IPPS
2007
IEEE
14 years 2 months ago
Memory Optimizations For Fast Power-Aware Sparse Computations
— We consider memory subsystem optimizations for improving the performance of sparse scientific computation while reducing the power consumed by the CPU and memory. We first co...
Konrad Malkowski, Padma Raghavan, Mary Jane Irwin
RTSS
2007
IEEE
14 years 2 months ago
Implementing Hybrid Operating Systems with Two-Level Hardware Interrupts
In this paper, we propose to implement hybrid operating systems based on two-level hardware interrupts. To separate real-time and non-real-time hardware interrupts by hardware, we...
Miao Liu, Zili Shao, Meng Wang, Hongxing Wei, Tian...