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JSA
2000
116views more  JSA 2000»
13 years 7 months ago
Distributed vector architectures
Integrating processors and main memory is a promising approach to increase system performance. Such integration provides very high memory bandwidth that can be exploited efficientl...
Stefanos Kaxiras
COMCOM
2002
120views more  COMCOM 2002»
13 years 7 months ago
The Cyclone Server Architecture: streamlining delivery of popular content
Abstract-We propose a new webserver architecture optimized for delivery of large, popular files. Delivery of such files currently pose a scalability problem for conventional conten...
Stanislav Rost, John W. Byers, Azer Bestavros
IPPS
2010
IEEE
13 years 5 months ago
Structuring the execution of OpenMP applications for multicore architectures
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
François Broquedis, Olivier Aumage, Brice G...
ISCA
2009
IEEE
146views Hardware» more  ISCA 2009»
14 years 2 months ago
Multi-execution: multicore caching for data-similar executions
While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...
Susmit Biswas, Diana Franklin, Alan Savage, Ryan D...
DAC
2009
ACM
14 years 8 months ago
A DVS-based pipelined reconfigurable instruction memory
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
Zhiguo Ge, Tulika Mitra, Weng-Fai Wong