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    DAC
    1995
    ACM
    159views Computer Architecture» more  DAC 1995»
    A Transformation-Based Approach for Storage Optimization
    13 years 11 months ago
    A Transformation-Based Approach for Storage Optimization
    Download  www.cecs.uci.edu
    High-level synthesis (HLS) has been successfully targeted towards the digital signal processing (DSP) domain. Both application-speci c integrated circuits (ASICs) and application-...
    Wei-Kai Cheng, Youn-Long Lin
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    DAC
    1995
    ACM
    104views Computer Architecture» more  DAC 1995»
    Synthesis of Software Programs for Embedded Control Applications
    13 years 11 months ago
    Synthesis of Software Programs for Embedded Control Applications
    Download  www.cs.ucr.edu
    — Software components for embedded reactive real-time applications must satisfy tight code size and runtime constraints. Cooperating finite state machines provide a convenient i...
    Massimiliano Chiodo, Paolo Giusto, Attila Jurecska...
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    DAC
    1995
    ACM
    117views Computer Architecture» more  DAC 1995»
    The Elmore Delay as a Bound for RC Trees with Generalized Input Signals
    13 years 11 months ago
    The Elmore Delay as a Bound for RC Trees with Generalized Input Signals
    Download  www.cecs.uci.edu
    The Elmore delay is an extremely popular delay metric, particularly for RC tree analysis. The widespread usage of this metric is mainly attributable to it being the most accurate ...
    Rohini Gupta, Byron Krauter, Bogdan Tutuianu, John...
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    DAC
    1995
    ACM
    143views Computer Architecture» more  DAC 1995»
    On the Bounded-Skew Clock and Steiner Routing Problems
    13 years 11 months ago
    On the Bounded-Skew Clock and Steiner Routing Problems
    Download  vlsicad.ucsd.edu
    We study the minimum-costbounded-skewrouting tree (BST) problem under the linear delay model. This problem captures several engineering tradeoffs in the design of routing topologi...
    Dennis J.-H. Huang, Andrew B. Kahng, Chung-Wen Alb...
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    DAC
    1995
    ACM
    111views Computer Architecture» more  DAC 1995»
    Hierarchical Optimization of Asynchronous Circuits
    13 years 11 months ago
    Hierarchical Optimization of Asynchronous Circuits
    Download  cwc.ucsd.edu
    Abstract— Many asynchronous designs are naturally specified and implemented hierarchically as an interconnection of separate asynchronous modules that operate concurrently and c...
    Bill Lin, Gjalt G. de Jong, Tilman Kolks
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