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ICC
2007
IEEE
164views Communications» more  ICC 2007»
14 years 1 months ago
Communication Limits with Low Precision Analog-to-Digital Conversion at the Receiver
— We examine the Shannon limits of communication systems when the precision of the analog-to-digital conversion (ADC) at the receiver is constrained. ADC is costly and powerhungr...
Jaspreet Singh, Onkar Dabeer, Upamanyu Madhow
ISCAS
2007
IEEE
148views Hardware» more  ISCAS 2007»
14 years 1 months ago
Bandwidth Mismatch Correction for a Two-Channel Time-Interleaved A/D Converter
— Mismatches between sample-and-hold (S/H) circuits in a time-interleaved analog-to-digital data converter (ADC) cause undesirable distortions in the output spectrum. To reduce t...
Patrick Satarzadeh, Bernard C. Levy, Paul J. Hurst
ISCAS
2007
IEEE
121views Hardware» more  ISCAS 2007»
14 years 1 months ago
A Digital-Summing Feedforward Sigma-Delta Modulator and its Application to a Cascade ADC
Yi Tang, Subhanshu Gupta, Jeyanandh Paramesh, Davi...
ISCAS
2007
IEEE
139views Hardware» more  ISCAS 2007»
14 years 1 months ago
Low-Power CMOS Comparator with Embedded Amplification for Ultra-high-speed ADCs
J. P. Oliveira, João Goes, Bruno Esperanca,...