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ASAP
2005
IEEE
87views Hardware» more  ASAP 2005»
14 years 12 days ago
Expression Synthesis in Process Networks generated by LAURA
The COMPAAN/LAURA [18] tool chain maps nested loop applications written in Matlab onto reconfigurable platforms, such as FPGAs. COMPAAN rewrites the original Matlab application a...
Claudiu Zissulescu, Bart Kienhuis, Ed F. Depretter...
FM
2005
Springer
114views Formal Methods» more  FM 2005»
14 years 9 days ago
Systematic Implementation of Real-Time Models
Recently we have proposed the ”almost ASAP” semantics as an alternative semantics for timed automata. This semantics is useful when modeling real-time controllers : control str...
Martin De Wulf, Laurent Doyen, Jean-Françoi...
ASAP
2005
IEEE
96views Hardware» more  ASAP 2005»
14 years 12 days ago
On-Chip Lookup Tables for Fast Symmetric-Key Encryption
On public communication networks such as the Internet, data confidentiality can be provided by symmetric-key ciphers. One of the most common operations used in symmetric-key ciphe...
A. Murat Fiskiran, Ruby B. Lee
ASAP
2005
IEEE
142views Hardware» more  ASAP 2005»
14 years 12 days ago
Decimal Floating-Point Square Root Using Newton-Raphson Iteration
With continued reductions in feature size, additional functionality may be added to future microprocessors to boost the performance of important application domains. Due to growth...
Liang-Kai Wang, Michael J. Schulte
ASAP
2005
IEEE
133views Hardware» more  ASAP 2005»
14 years 12 days ago
Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware
In this paper, we propose a hardware/software partitioning method for improving applications’ performance in embedded systems. Critical software parts are accelerated on hardwar...
Michalis D. Galanis, Grigoris Dimitroulakos, Costa...