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ASPDAC
2001
ACM
105views Hardware» more  ASPDAC 2001»
14 years 2 months ago
Toward better wireload models in the presence of obstacles
Wirelength estimation techniques typically contain a site density function that enumerates all possible path sites for each wirelength in an architecture and an occupation probabil...
Chung-Kuan Cheng, Andrew B. Kahng, Bao Liu, Dirk S...
ASPDAC
2001
ACM
120views Hardware» more  ASPDAC 2001»
14 years 2 months ago
Virtual Java/FPGA interface for networked reconfiguration
Abstract- Avirtual interfacebetweenJava andFPGA for networked reconfigurationis presented. ThroughtheJavaflFPGAinterface,Java applicationscan exploithardwareaccelerators with FPGAs...
Yajun Ha, Geert Vanmeerbeeck, Patrick Schaumont, S...
ASPDAC
2001
ACM
75views Hardware» more  ASPDAC 2001»
14 years 2 months ago
Integrated power supply planning and floorplanning
One of the most challenging issues in today's high-performance VLSI design is to ensure high-quality power supply to each individual circuit blocks. Reduced power supply volt...
I-Min Liu, Hung-Ming Chen, Tan-Li Chou, Adnan Aziz...
ASPDAC
2001
ACM
75views Hardware» more  ASPDAC 2001»
14 years 2 months ago
Correlation method of circuit-performance and technology fluctuations for improved design reliability
Abstract-- We propose a method of correlating circuit performance with technology fluctuations during the circuit-design phase. The method employs test circuits sensitive for techn...
D. Miyawaki, Shizunori Matsumoto, Hans Jürgen...
ASPDAC
2001
ACM
68views Hardware» more  ASPDAC 2001»
14 years 2 months ago
Reducing bus delay in submicron technology using coding
ct,. In this paper we study the delay associated with transmission of data through busses. Previous work in this area has presented models for delay assuming a distributed wire mqd...
Paul-Peter Sotiriadis, Anantha Chandrakasan