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ASPDAC
2008
ACM
135views Hardware» more  ASPDAC 2008»
13 years 11 months ago
Temperature-aware MPSoC scheduling for reducing hot spots and gradients
Thermal hot spots and temperature gradients on the die need to be minimized to manufacture reliable systems while meeting energy and performance constraints. In this work, we solve...
Ayse Kivilcim Coskun, Tajana Simunic Rosing, Keith...
ASPDAC
2008
ACM
92views Hardware» more  ASPDAC 2008»
13 years 11 months ago
Design space exploration for a coarse grain accelerator
- In the design process of a reconfigurable accelerator employing in an embedded system, multitude parameters may result in remarkable complexity and a large design space. Design s...
Farhad Mehdipour, Hamid Noori, Morteza Saheb Zaman...
ASPDAC
2008
ACM
78views Hardware» more  ASPDAC 2008»
13 years 11 months ago
Handling partial correlations in yield prediction
In nanometer regime, IC designs have to consider the impact of process variations, which is often indicated by manufacturing/parametric yield. This paper investigates a yield model...
Sridhar Varadan, Janet Meiling Wang, Jiang Hu
ASPDAC
2008
ACM
89views Hardware» more  ASPDAC 2008»
13 years 11 months ago
Load scheduling: Reducing pressure on distributed register files for free
In this paper we describe load scheduling, a novel method that balances load among register files by residual resources. Load scheduling can reduce register pressure for clustered...
Mei Wen, Nan Wu, Maolin Guan, Chunyuan Zhang
ASPDAC
2008
ACM
129views Hardware» more  ASPDAC 2008»
13 years 11 months ago
Clock tree synthesis with data-path sensitivity matching
This paper investigates methods for minimizing the impact of process variation on clock skew using buffer and wire sizing. While most papers on clock trees ignore data-path circuit...
Matthew R. Guthaus, Dennis Sylvester, Richard B. B...