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ASPDAC
2009
ACM
120views Hardware» more  ASPDAC 2009»
14 years 2 months ago
Path selection for monitoring unexpected systematic timing effects
Nicholas Callegari, Pouria Bastani, Li-C. Wang, Sr...
ASPDAC
2009
ACM
119views Hardware» more  ASPDAC 2009»
14 years 4 months ago
A Time-to-Digital Converter with small circuitry
Kazuya Shimizu, Masato Kaneta, HaiJun Lin, Haruo K...
ASPDAC
2009
ACM
137views Hardware» more  ASPDAC 2009»
14 years 4 months ago
Ultra low-power ANSI S1.11 filter bank for digital hearing aids
Yu-Ting Kuo, Tay-Jyi Lin, Yueh-Tai Li, Chou-Kun Li...
ASPDAC
2009
ACM
150views Hardware» more  ASPDAC 2009»
14 years 4 months ago
Using a dataflow abstracted virtual prototype for HdS-design
Dataflow abstracted Virtual Prototype for HdS-Design Wolfgang Ecker Stefan Heinen Michael Velten Infineon Technologies AG Germany ASPDAC 2009 Special Session Hardware-dependent Sof...
Wolfgang Ecker, Stefan Heinen, Michael Velten
ASPDAC
2009
ACM
131views Hardware» more  ASPDAC 2009»
14 years 4 months ago
A 1 GHz CMOS comparator with dynamic offset control technique
− A dynamic offset control technique that employs charge compensation by timing control is proposed for comparator design in scaled CMOS technology. The analysis has
Xiaolei Zhu, Sanroku Tsukamoto, Tadahiro Kuroda