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FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
14 years 1 months ago
Efficient hardware checkpointing: concepts, overhead analysis, and implementation
Progress in reconfigurable hardware technology allows the implementation of complete SoCs in today's FPGAs. In the context design for reliability, software checkpointing is a...
Dirk Koch, Christian Haubelt, Jürgen Teich
GECCO
2007
Springer
184views Optimization» more  GECCO 2007»
14 years 1 months ago
Multi-objective optimization tool for a free structure analog circuits design using genetic algorithms and incorporating parasit
This paper presents a novel approach for a free structure analog circuit design using Genetic Algorithms (GA). A major problem in a free structure circuit is its sensitivity calcu...
Yaser M. A. Khalifa, Badar K. Khan, Faisal Taha
GLVLSI
2007
IEEE
166views VLSI» more  GLVLSI 2007»
14 years 1 months ago
Efficient pipelining for modular multiplication architectures in prime fields
This paper presents a pipelined architecture of a modular Montgomery multiplier, which is suitable to be used in public key coprocessors. Starting from a baseline implementation o...
Nele Mentens, Kazuo Sakiyama, Bart Preneel, Ingrid...
ICASSP
2007
IEEE
14 years 1 months ago
Texture Classification by using Advanced Local Binary Patterns and Spatial Distribution of Dominant Patterns
In this paper, we propose a new feature extraction method, which is robust against rotation and histogram equalization for texture classification. To this end, we introduce the co...
Shu Liao, Albert C. S. Chung
ICC
2007
IEEE
152views Communications» more  ICC 2007»
14 years 1 months ago
Characterizing and Exploiting Partial Interference in Wireless Mesh Networks
Abstract-- In evaluating the performance of a wireless network, the interference between wireless links plays a key role. In previous works, interference was assumed to be a binary...
Ka-Hung Hui, Wing Cheong Lau, On-Ching Yue