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GLVLSI
2011
IEEE
344views VLSI» more  GLVLSI 2011»
12 years 11 months ago
Circuit design of a dual-versioning L1 data cache for optimistic concurrency
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
Azam Seyedi, Adrià Armejach, Adrián ...
ICASSP
2011
IEEE
12 years 11 months ago
A knowledge-based algorithm to remove blocking artifacts in skin images for forensic analysis
Identifying criminals and victims in evidence images, where their faces are covered or obstructed, is a challenging task. In the legal case, United States v. Michael Joseph Pepe (...
Chaoying Tang, Adams Wai-Kin Kong, Noah Craft
ICDE
2011
IEEE
194views Database» more  ICDE 2011»
12 years 11 months ago
Representative skylines using threshold-based preference distributions
— The study of skylines and their variants has received considerable attention in recent years. Skylines are essentially sets of most interesting (undominated) tuples in a databa...
Atish Das Sarma, Ashwin Lall, Danupon Nanongkai, R...
TASE
2011
IEEE
12 years 11 months ago
Multiresource Shop Scheduling With Resource Flexibility and Blocking
—This paper proposes a general scheduling model that extends job-shop scheduling models to incorporate important features of real manufacturing systems. More precisely, each oper...
Yazid Mati, Xiaolan Xie
ASPDAC
2011
ACM
297views Hardware» more  ASPDAC 2011»
12 years 11 months ago
CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits
3-D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. Since the device layers are processed in sequent...
Shashikanth Bobba, Ashutosh Chakraborty, Olivier T...