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ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
14 years 27 days ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks
ICS
2004
Tsinghua U.
14 years 26 days ago
EXPERT: expedited simulation exploiting program behavior repetition
Studying program behavior is a central component in architectural designs. In this paper, we study and exploit one aspect of program behavior, the behavior repetition, to expedite...
Wei Liu, Michael C. Huang
CGO
2010
IEEE
14 years 18 days ago
Lightweight feedback-directed cross-module optimization
Cross-module inter-procedural compiler optimization (IPO) and Feedback-Directed Optimization (FDO) are two important compiler techniques delivering solid performance gains. The co...
David Xinliang Li, Raksit Ashok, Robert Hundt
LCPC
2009
Springer
14 years 1 days ago
Using the Meeting Graph Framework to Minimise Kernel Loop Unrolling for Scheduled Loops
This paper improves our previous research effort [1] by providing an efficient method for kernel loop unrolling minimisation in the case of already scheduled loops, where circular...
Mounira Bachir, David Gregg, Sid Ahmed Ali Touati
CP
2001
Springer
13 years 12 months ago
Fast Optimal Instruction Scheduling for Single-Issue Processors with Arbitrary Latencies
Instruction scheduling is one of the most important steps for improving the performance of object code produced by a compiler. The local instruction scheduling problem is to nd a m...
Peter van Beek, Kent D. Wilken