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IPPS
2000
IEEE
14 years 2 months ago
Declarative Concurrency in Java
We propose a high-level language based on rst order logic for expressing synchronization in concurrent object-oriented programs. The language allows the programmer to declaratively...
Rafael Ramirez, Andrew E. Santosa
ICCD
2000
IEEE
93views Hardware» more  ICCD 2000»
14 years 7 months ago
Cheap Out-of-Order Execution Using Delayed Issue
In superscalar architectures, out-of-order issue mechanisms increase performance by dynamically rescheduling instructions that cannot be statically reordered by the compiler. Whil...
J. P. Grossman
JFP
2000
163views more  JFP 2000»
13 years 9 months ago
Automatic useless-code elimination for HOT functional programs
In this paper we present two type inference systems for detecting useless-code in higher-order typed functional programs. Type inference can be performed in an efficient and compl...
Ferruccio Damiani, Paola Giannini
ICC
2000
IEEE
14 years 2 months ago
A Class of Block-Iterative Equalizers for Intersymbol Interference Channels
—A new and efficient class of nonlinear equalizers is developed for intersymbol interference (ISI) channels. These “iterated-decision equalizers” use an optimized multipass a...
Albert M. Chan, Gregory W. Wornell
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
14 years 2 months ago
VLSI Design of Multi Standard Turbo Decoder for 3G and Beyond
Turbo decoding architectures have greater error correcting capability than any other known code. Due to their excellent performance turbo codes have been employed in several trans...
Imran Ahmed, Tughrul Arslan