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ICCAD
2010
IEEE
141views Hardware» more  ICCAD 2010»
13 years 8 months ago
Local clock skew minimization using blockage-aware mixed tree-mesh clock network
Clock network construction is one key problem in high performance VLSI design. Reducing the clock skew variation is one of the most important objectives during clock network synthe...
Linfu Xiao, Zigang Xiao, Zaichen Qian, Yan Jiang, ...
IANDC
2010
115views more  IANDC 2010»
13 years 7 months ago
18th International Conference on Concurrency Theory
We consider message sequence charts enriched with timing constraints between pairs of events. As in the untimed setting, an infinite family of time-constrained message sequence cha...
Luís Caires, Vasco Thudichum Vasconcelos
JDCTA
2010
225views more  JDCTA 2010»
13 years 5 months ago
Multi-Level Weighted Sequential Pattern Mining Based on Prime Encoding
Encoding can express the hierarchical relationship in the area of mining the multi-level sequential pattern, up to now all the algorithms of which find frequent sequences just acc...
Yun Li, Lianglei Sun, Jiang Yin, Wenyan Bao, Mengy...
JMLR
2010
128views more  JMLR 2010»
13 years 5 months ago
Fluid Dynamics Models for Low Rank Discriminant Analysis
We consider the problem of reducing the dimensionality of labeled data for classification. Unfortunately, the optimal approach of finding the low-dimensional projection with minim...
Yung-Kyun Noh, Byoung-Tak Zhang, Daniel D. Lee
JMLR
2010
149views more  JMLR 2010»
13 years 5 months ago
Learning Bayesian Network Structure using LP Relaxations
We propose to solve the combinatorial problem of finding the highest scoring Bayesian network structure from data. This structure learning problem can be viewed as an inference pr...
Tommi Jaakkola, David Sontag, Amir Globerson, Mari...