This paper describes a technique for calculating the switching activity of a set of registers shared by dierent data values. Based on the assumption that the joint pdf (probabili...
—Motivated by the goal of increasing the performance of FPGA-based designs, we propose new Steiner and arborescence FPGA routing algorithms. Our Steiner tree constructions signiï...
- Power estimation in combinational modules is addressed from a probabilistic point of view. The zero-delay hypothesis is considered and under highly correlated input streams, the ...
Abstract A new method for power estimation in sequential circuits is presented that is based on a statistical estimation technique. By applying randomly generated input sequences t...
Our goal is to transform a low-level circuit design into a more representation. A pre-existing tool, Tranalyze [4], takes a switch-level circuit and generates a functionally equiv...