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    DAC
    2005
    ACM
    123views Computer Architecture» more  DAC 2005»
    A quasi-convex optimization approach to parameterized model order reduction
    14 years 8 months ago
    A quasi-convex optimization approach to parameterized model order reduction
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    In this paper an optimization based model order reduction (MOR) framework is proposed. The method involves setting up a quasiconvex program that explicitly minimizes a relaxation ...
    Kin Cheong Sou, Alexandre Megretski, Luca Daniel
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    DAC
    2005
    ACM
    134views Computer Architecture» more  DAC 2005»
    Cache coherence support for non-shared bus architecture on heterogeneous MPSoCs
    14 years 8 months ago
    Cache coherence support for non-shared bus architecture on heterogeneous MPSoCs
    Download  users.ece.gatech.edu
    We propose two novel integration techniques -- bypass and bookkeeping -- in the memory controller to address the cache coherence compatibility issue of a non-shared bus heterogene...
    Taeweon Suh, Daehyun Kim, Hsien-Hsin S. Lee
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    DAC
    2005
    ACM
    102views Computer Architecture» more  DAC 2005»
    Operator-based model-order reduction of linear periodically time-varying systems
    14 years 8 months ago
    Operator-based model-order reduction of linear periodically time-varying systems
    Download  www.cs.york.ac.uk
    eriodically time-varying (LPTV) abstractions are useful for a variety of communication and computer subsystems. In this paper, we present a novel operator-based model-order reduct...
    Yayun Wan, Jaijeet S. Roychowdhury
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    DAC
    2005
    ACM
    102views Computer Architecture» more  DAC 2005»
    Structure preserving reduction of frequency-dependent interconnect
    14 years 8 months ago
    Structure preserving reduction of frequency-dependent interconnect
    Download  www.ece.rice.edu
    A rational Arnoldi method for passivity-preserving model-order reduction (MOR) with implicit multi-point moment matching for systems with frequency-dependent interconnects is desc...
    Quming Zhou, Kartik Mohanram, Athanasios C. Antoul...
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    DAC
    2005
    ACM
    125views Computer Architecture» more  DAC 2005»
    Performance space modeling for hierarchical synthesis of analog integrated circuits
    13 years 9 months ago
    Performance space modeling for hierarchical synthesis of analog integrated circuits
    Download  videos.dac.com
    Automated analog sizing is becoming an unavoidable solution for increasing analog design productivity. The complexity of typical analog SoC subsystems however calls for efficient ...
    Georges G. E. Gielen, Trent McConaghy, Tom Eeckela...
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