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    DAC
    2005
    ACM
    240views Computer Architecture» more  DAC 2005»
    FLEXBUS: a high-performance system-on-chip communication architecture with a dynamically configurable topology
    14 years 8 months ago
    FLEXBUS: a high-performance system-on-chip communication architecture with a dynamically configurable topology
    Download  esdat.ucsd.edu
    In this paper, we describe FLEXBUS, a flexible, high-performance onchip communication architecture featuring a dynamically configurable topology. FLEXBUS is designed to detect run...
    Krishna Sekar, Kanishka Lahiri, Anand Raghunathan,...
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    DAC
    2005
    ACM
    118views Computer Architecture» more  DAC 2005»
    Power optimal dual-Vdd buffered tree considering buffer stations and blockages
    14 years 8 months ago
    Power optimal dual-Vdd buffered tree considering buffer stations and blockages
    Download  eda.ee.ucla.edu
    This paper presents the first in-depth study on applying dual Vdd buffers to buffer insertion and multi-sink buffered tree construction for power minimization under delay constrai...
    King Ho Tam, Lei He
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    DAC
    2005
    ACM
    161views Computer Architecture» more  DAC 2005»
    A non-parametric approach for dynamic range estimation of nonlinear systems
    14 years 8 months ago
    A non-parametric approach for dynamic range estimation of nonlinear systems
    Download  www.eecg.toronto.edu
    It has been widely recognized that the dynamic range information of an application can be exploited to reduce the datapath bitwidth of either processors or ASICs, and therefore th...
    Bin Wu, Jianwen Zhu, Farid N. Najm
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    DAC
    2005
    ACM
    112views Computer Architecture» more  DAC 2005»
    Correlation-preserved non-gaussian statistical timing analysis with quadratic timing model
    14 years 8 months ago
    Correlation-preserved non-gaussian statistical timing analysis with quadratic timing model
    Download  vlsi.ece.wisc.edu
    Recent study shows that the existing first order canonical timing model is not sufficient to represent the dependency of the gate delay on the variation sources when processing an...
    Lizheng Zhang, Weijen Chen, Yuhen Hu, John A. Gubn...
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    DAC
    2005
    ACM
    110views Computer Architecture» more  DAC 2005»
    High performance computing on fault-prone nanotechnologies: novel microarchitecture techniques exploiting reliability-delay trad
    14 years 8 months ago
    High performance computing on fault-prone nanotechnologies: novel microarchitecture techniques exploiting reliability-delay trad
    Download  users.ece.utexas.edu
    Device and interconnect fabrics at the nanoscale will have a density of defects and susceptibility to transient faults far exceeding those of current silicon technologies. In this...
    Andrey V. Zykov, Elias Mizan, Margarida F. Jacome,...
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